I remember offhand something about photonic chips being something that can work well at the 100nm transistor size when I was looking at it a couple years ago, and that being an argument for greater decentralization since the fab costs would be much lower. I'm not sure what the size-efficiency relationship is like if you go past that.

My thought would also be parallel ASICs, shared power infrastructure would make more sense. Why do you save die space by having the two parallel systems be on the same chip?